This invention relates to a memory bus transmission system for use in a semiconductor memory device or the like and, in particular, to a semiconductor memory device comprising a memory controller and a memory device mounted on a mother board and a memory bus transmission system therefor.
In general, the semiconductor memory device of the type described comprises a mother board and a memory module mounted on the mother board through a connector. In this event, a memory controller is mounted on the mother board and a plurality of memories are mounted on the memory module. The memory controller and the memory module are electrically connected to each other through signal interconnections given with high frequency signals such as a reference clock interconnections, data connections, and so on and are also electrically connected to each other through a ground interconnection and a power supply interconnection. In the semiconductor memory device of the form described, a driver having a push-pull structure is provided in the device of each of the memories and the memory controller. This driver is connected between the ground interconnection and the power supply interconnection and is connected to other devices through a signal interconnection having a bus structure through which data are inputted and outputted.
The mother board and the memory module described above have a multilayer interconnection structure where the above-mentioned each interconnection is formed in a shape of an interconnection layer. The interconnection layers of both of the mother board and the memory module are electrically connected to each other through pins provided in the connector and the interconnection layers comprises a memory transmission system.
On the other hand, with demand of a high speed for the memory device in recent years, in the semiconductor memory device using such a memory transmission system, to operate at a high frequency of several hundreds of megahertz or more is required.
However, when the semiconductor memory device is operated at the high frequency of several hundreds of megahertz or more, various problems occurred which are no problem in a case of operating at a low frequency. For instance, in a case where operation is carried out at the above-mentioned high frequency, when a voltage given in the signal interconnection layer composing the multilayer interconnection layer is observed at both of the driver of the output side and the memory controller of the input side, it was observed that an input voltage waveform is largely disturbed for an output voltage waveform. That is, it was known in the semiconductor memory device comprising the above-mentioned memory transmission system that the voltage waveform of the signal is largely disturbed when the signal having the high frequency is outputted on the signal interconnection and degradation of a signal quality occurs.
The co-inventors further studied the above-mentioned degradation of the voltage waveform of the signal in detailed. It was known that also a waveform of a return current flowing in the ground layer or the power supply layer is largely disturbed. It was understood that, by controlling the disturbance of a current waveform in such as a return current, that it is possible to improve quality of the voltage waveform of the signal in the signal interconnection and it is possible to control unnecessary electromagnetic wave radiation.
On the basis of the above-mentioned knowledge, the present co-inventors studied about a cause of the disturbance of the current waveform in the ground layer and the power supply layer caused by the disturbance of the signal voltage waveform. As a result, the present co-inventors cleared up that the cause of the disturbance of the current waveform is based on a difference of structure between the multilayer interconnection layer in the mother board and the multilayer interconnection layer in the memory module. In other words, it was understood that the disturbance of the current waveform occurs a reference clock interconnection, a data interconnection, and a signal interconnection operating at a high frequency similar to that in their interconnections among signal interconnections electrically connecting between the memory controller on the mother board and the memories on the memory module so that conductive layers opposite to each signal interconnection are not unified at a section between the mother board and the memory module.
Furthermore, in a conventional semiconductor memory device, two interconnections excepting for the signal interconnections closest to each signal interconnection at the section of the connector often have different potentials to the opposite conductive layers. When such interconnections are carried out at the connector section, in a high frequency of several hundreds of megahertz or more, a phenomenon so that the return current flows locally in the vicinity of directly under the bus interconnection in the opposite layer disposed under the bus interconnection occurs.
However, in a case where opposite layers of the bus in the memory module and the mother board are different from each other, it was understood that disturbance occurs in a flow of the return current and degradation happens in a transmission signal of the bus caused by this.
The above-mentioned point will be made described in more detailed. There is a case where position relationships are different between the multilayer interconnection structure on the mother board including the conductive layer opposite to the signal interconnection layer and the multilayer interconnection structure on the memory module. For example, the ground layer is disposed as the opposite layer of the signal interconnection layer on the mother board while the power supply layer is disposed as the opposite layer of the signal interconnection layer on the memory module.
When the conductive layer opposite to the signal interconnection layer changes from the ground layer to the power supply layer or from the power supply layer to the ground layer in the manner which is described above, it was understood that a phenomenon so that disturbances occur in a waveform of the return current flowing in the conductive layer caused by an impedance mismatching or the like is found and the disturbances of the waveform of the return current have a bad influence for quality of a voltage waveform of the signal in the signal interconnection layer.